Analog Simulation:The SPICE Concept.

The SPICE Concept

SPICE is a universal simulation program for the analysis of electronic circuits. It is able to handle non-linear direct current analysis, dynamic transient analysis, and linear small signal alternating current analysis with different temperatures. In addition to simulation of passive components, independent and controlled sources, it allows the simulation of seven different semiconductor models.

Types of Analysis

The following types of analysis are possible in SPICE [10.19]:

• DC Analysis. DC Analysis stands for nonlinear direct current analysis, in which the operational point of an electronic circuit is determined. For this purpose inductors are replaced by short circuits and capacitors by open circuits. A DC analysis is automatically performed before an AC or TR analysis is started (see below) in order to determine defined starting conditions or small signal parameters for the operating point. In addition, the DC analysis can be used to calculate DC transfer curves by changing the values of an independent DC source and listing the resulting output variables of interest. It is also possible to determine the DC small signal sensitivities of certain output variables with respect to circuit parameter alteration.

• AC Analysis. AC Analysis stands for a linear small signal alternating current analysis. Here the AC output variable is determined in a frequency range wanted in which the non- linear semiconductor models are replaced by linearised small signal models whose parameters are generated in the preceding DC analysis. A special case of AC analysis is that of noise analysis.

• TR Analysis. TR Analysis stands for large signal analysis of the transient behavior of a circuit. Examples are the calculation of the step or pulse response of a nonlinear circuit where the initial conditions are either determined by a preceding DC analysis or by given capacitor voltages or inductor currents, respectively.

Circuit Description by a Netlist

The input for the program SPICE is provided by a netlist formed according to fixed rules. Nowadays the netlist is usually generated by an auxiliary program, the schematic editor. But for error detection knowledge of the SPICE netlist structure is indispensable.

The netlist comprises, on the one hand, component lines which define the topology of the circuit, and the component values. The control lines, on the other hand, define the model parameter and the types of analysis. The first line in a netlist is always a title line in the form of a comment and will not be processed. The last line is always ‘.END’. In between, the order of lines is arbitrary.

Each component of a circuit is described by a component line that comprises its name, its connection node numbers and its value. The first letter of the component name signifies the type of component (e.g., R for a resistor), followed by up to seven characters which can be alphanumerical. Nodes are signified by non-negative numbers (letters are also allowed in newer SPICE editions), not necessarily consecutive. The reference node (ground) always has the number 0. Each node must have two connections (exceptions are MOSFET substrate and an open transmission line). Table shows the structure of the most important component lines of a SPICE netlist.

Comment to the netlist format:

• The component name starts with the letter shown and can comprise up to eight alphanumerical characters.

• N+ and N− signify the connection nodes and define in their order a direction (when necessary, e.g., for a voltage source).

• ‘Value’ is a numerical value that can be considered as Ohm, Farad, Henry, Volt, Ampere, Siemens, V/V, A/A respectively).

• ‘Type’ = type of source: DC, AC, SIN, PULSE, PWL (piecewise linear).

• NC+ and NC− are the controlling nodes for the control voltage.

• VNAM is the voltage source through which the controlling current is flowing.

• MNAME refers to a semiconductor model which is either user defined or taken from a library.

• AREA is an (optional) area scaling factor.

• NC, NB, NE, NS are nodes with which the col- lector, base, emitter and (optionally) substrate of a BJT are connected.

• ND, NG, NS, NB are nodes with which drain, gate, source and substrate of a JFET or MOS- FET are connected.

• L and W are channel length and width in m.

History

The design of an electronic circuit normally needs an experimental verification because usually the first approach to the design is done with simplified models of the components so a check is neces- sary to determine whether the simplifications are suitable. As long as one had to deal with a few components only an experimental bread board test was appropriate. Dealing with integrated circuits, bread boarding is not possible any longer because soldering lumped components together leads to totally different electrical conditions compared to those of the integrated miniaturised circuit, owing to different stray capacitances and transmission line effects. Therefore, with the integrated circuit becoming more and more popular and economical,

simulation of the circuit becomes more and more important. Components are described by mathematical models, numerical methods replacing typical measurements such as determination of frequency or time response. In addition a simulation program can provide information which is hard to achieve otherwise, e.g., how sensitively a circuit reacts to component changes (Sensitivity Analysis).

There are many different methods of how to analyze electronic networks, therefore there are many different simulation programs. A committee of the NTG (Nachrichtentechnische Gesellschaft = Communication Society), to which the author of this chapter belonged, tried to evaluate the different simulation programs for electronic circuits in 1972/73 [10.16]. Today practically only SPICE is quoted, and this because of three reasons:

• The user-friendliness of SPICE. The input language is very simple and adapted to the language of an electronic engineer. The program automatically inserts reasonable default parameters for semiconductors if the user does not or cannot specify them. A very clever error control generally avoids computer time-consuming erroneous circuit analyses.

• The competent scientific research which was done by the creators of the program. In addition to Prof. PEDERSON [10.11], one has to name  Prof. NAGEL of the University of California, Berkeley who investigated in his dissertation [10.12] the different methods of matrix construction, dealing with non- linearities and numerical integration, selecting the optimal methods respectively.

The generous distribution of SPICE. Everybody  who was interested could get the program practically free! SPICE 1 was released by the University of California, Berkeley, in May 1972 and was extensively used afterwards by students and the semiconductor industry. After 17 updates SPICE 2 was released (1975), a much more powerful program owing to dynamic memory organization and automatic time step control. In the meantime many new versions (conductance matrix · voltage vector = current vector) of SPICE were issued, signifying the success of  the program and its adaptability to the different needs of the user. For several years there havebeen SPICE versions suitable for PCs ‘PSPICE’ [10.5]. With this option the range of users has increased tremendously and the program is a world wide success.

Mathematical Algorithms in SPICE

An extended discussion of the algorithms used in SPICE is given in [10.11]. It would be beyond the scope of this chapter to discuss all the algorithms in detail, but in order to convey a basic understanding of the mathematical background to the reader the following approach was chosen, namely that of fundamental mathematical principles discussed with reference to CALAHAN [10.2] in which SPICE specific modifications and special- ities are mentioned.

Setup of Equation System

The equation system of SPICE is set up according to the node voltage analysis algorithm. The construction of the conductance matrix (with complex elements when using AC analysis) follows very simple rules.

• An element on the main diagonal aii is calculated as the sum of conductances connected to the node i.

• All other matrix elements aij are equal to the negative conductance connecting nodes i and j.

A simple example is to show the setup of the conductance matrix. Consider the electrical network shown in fig. 10.1. Wanted are the normalized node voltages x1, x2, x3 which can easily be deter- mined elementarily (x1 = 1/2, x2 = 1/4, x3 = 1/4) with this simple problem. The rules given above lead to the following system of equations:

This simple setup is only valid if all sources are current sources. In applications voltage sources are used much more and in SPICE a modified node analysis can be found. The right hand side of the equation system then consists of a vector which contains the given currents and voltages of the sources, the vector of the unknown quantities then contains the node voltages and the currents through the given voltage sources. The modified node analysis is considered the simplest and most effective setup method compared to many other approaches [10.11].

Solution of the equation system

The solution of the equation system is done in SPICE by means of the LU factorization algorithm with following forward and backward substitution. LU factorization means that the original matrix is factorized into two matrices where the L matrix only contains elements on and below the main diagonal which contains only one.

By this factorization the number of elements is the same as before so no additional memory is needed. Intermediate storage is also not necessary as the factorization algorithm uses successive elements of the original matrix to determine the new elements without having to use them afterwards again. Thus the new elements can be stored in

memory places where originally the old elements were to be found and is a very economical procedure especially when dealing with large networks.

In matrix notation the factorization results in:

Using equation (10.1) and by forward substitution (zeroes above the main diagonal in the L matrix) gives the solution

Special attention is drawn to the two zeroes in the A matrix. It is a typical property of electrical networks that they lead to matrices which contain many zeroes (sparse matrices). In our simple example this property is not so significant; however, larger networks lead to matrices  which contain 90 % or more zeroes! Special so called sparse matrix algorithms were developed to handle effectively such problems in order to save computer time and memory. SPICE uses a pointer system which points to only non-zero filled memory places. There are even more savings possible when the property is used that matrices of electrical networks are symmetrical or nearly symmetrical, thus the pointer system can be constructed very effectively.

As seen in equation (10.3) the original two zeroes in the A matrix are lost during the LU factorization, one speaks of so called ‘fills’. In SPICE a re-ordering of rows and columns takes place after each step of the LU factorization in order to minimize the number of ‘fills’. In [10.2] an example is shown in which the number of fills in a 19 node problem was reduced by a SPICE by means of the Newton Raphson algorithm. Figure 10.2 shows an example of a nonlinear circuit in which the connection between the diode current and the diode voltage is given, on the one hand by the following equation

On the other hand, diode current and voltage must obey the linear boundary condition given by the generator voltage Vi and the inner resistance Ri. Figure 10.3 shows the diode and the generator characteristics. In order to determine the operating point (the intersection of the two characteristics) the Newton Raphson algorithm proceeds in the following iterative way: at a starting point vm, im (in SPICE this is usually the point with the highest gradient of bending of the diode’s characteristic) a tangent to the diode characteristic is constructed and the intersection with the generator characteristic determined. As shown in fig. 10.3, the voltage value of the intersection defines the starting value for the next iteration. This procedure generally converges to the desired operating point. From fig. 10.3

The analysis of a network containing diodes is now carried out in the following way:

Each diode is replaced by its equivalent circuit diagram (fig. 10.4). For the point of highest grade of bending in the diode’s characteristic the values i0, v0, G0 are known, therefore an analysis of the linearized network can take place producing i1, v1, G1. With these values a new analysis of the linear network is performed, and this procedure is repeated as long as the voltages across the diodes do not alter more than a given error voltage compared to the voltages of the previous iteration. Thus the analysis of nonlinear networks is reduced to an iterative analysis of linear equivalent networks. Sometimes an overflow of the allowed number range of the computer can occur owing to the exponential increase of the current with respect to the voltage in diode problems. Modifications of the Newton Raphson algorithm by so called ‘simple  limiting’ in order to avoid overflow problems are described in [10.12].

Numerical Integration

The analysis of the transient behavior of electronic circuits is the most demanding and time consuming task for a simulation program. SPICE uses an implicit integration method for reasons of stability. The simplest example of an implicit method is the backward Euler integration. The procedure will be explained with a capacitor as an example. As is well known, the current and voltage of a capacitor are related in the way shown in fig. 10.5.

This equation defines an equivalent circuit for the capacitor which is shown in fig. 10.5. By means of the equivalent network and the knowledge of the voltage at the time point tn the voltage at the time point tn+1 can be determined, iterating this procedure until a given final time point is reached. Inductors can be handled in a similar way.

In [10.2] it is shown that the error connected with the backward Euler algorithm is dependent on the time step T in a linear way. SPICE uses trapezoid integration, an implicit algorithm in which the error is reduced quadratically when the time step decreases. A special problem is the choice of the appropriate time step, which is dependent on the time constants of the electrical circuit to be analyzed. These time constants can sometimes vary by several orders of magnitude. With a fixed time step one can either experience convergence problems or very high values of computer time if the time step is chosen according to the smallest time constant in the circuit. SPICE therefore has an automatic time step control which reduces the time step when steep slopes are involved and increases the time step during times of little activity. The intensive investigations of different integration methods and of different possibilities of time step control and the final optimal choice is certainly at least partly responsible for the success of SPICE.

The Program Structure of SPICE

Originally SPICE was written for the computer CDC 6400 and comprised 15,000 FORTRAN and assembler statements. The program consists of the root program, seven major segments, and a

common memory region (Blank Common) which is shown in fig. 10.7. With reference to fig. 10.7 the necessary memory range is found by adding 16 K (octal) of the root to 6 K (octal) of the biggest segment (DCTRAN = 6 K (octal)) and for the Common. When the program starts, the memory assigned to the Common is 4 K (octal). Should it be registered during the course of analysis that this memory is not sufficient then the memory of the Common is extended up to the maximum possibilities of the computer. This so called dynamic memory extension is an additional advantage of SPICE.

The tasks of the different segments in fig. 10.7 are listed in the following:

• READIN: read in of the input and construction of element and node lists which serve for dynamic extension of memory

• ERRCHK checks the input for plausibility, e.g., whether each node is connected with at least two elements. In addition, the model pa- rameters are checked, the missing once replaced by default values;

• SETUP constructs the pointer system for pro- cessing the sparse matrix. Re-orders the matrix in order to minimize ‘fills’. Generates machine code for fast LU factorization and for forward and backward substitution;

• DCTRAN the biggest and most complicated segment. Controls Newton Raphson iterations when determining the operational point and the initial conditions for the transient analysis. Re- peated DC analyses with altered inputs lead to DC transfer curves. Calculates TR analyses with automatic time step control;

 

• DCOP calculates linearized model parameters in the operating point. Controls sensitivity analysis;

• ACAN controls AC analysis of the (at the operational point) linearized network, also noise and distortion analysis;

• OVTPVT: prepares the output quantities, calls

plot routines. Fourier analysis of a distorted periodical waveform is possible here.

In the meantime SPICE was re-written in ‘C’ at the University of California, Berkeley, and the program structure refined and redeveloped. For several years the company Microsim (now taken over by OrCAD) has been marketing a PC version of SPICE under the name PSPICE or Design Center [10.10], [10.18].