Tabular Design Formats:EDIF (Electronic Design Interchange Format).

EDIF (Electronic Design Interchange Format)

With the onset of CAD (Computer Aided Design) methods at the beginning of the 1980s, the necessity arose to exchange design data between the programs of different suppliers. Based on an initial cooperation of interested companies, the EDIF Steering Committee was founded in 1983. The members were Daisy Systems, Mentor Graphics, Motorola, National Semiconductors, Tektronix, Texas Instruments, and the University of California at Berkley. The idea was neither to create a new language nor a new database, but rather a set of formats enabling the transport of a design from one tool to another. In other words, the goal was a certain independence from CAD suppliers.

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Based on those activities a first specification was published in 1985, EDIF 1 0 0. At the beginning all of the following design areas were supposed to be covered:

• Netlist;

• Mask layout;

• Symbolic Layout;

• Logic models;

• Test;

• Gate array;

• Parametric description;

• Algorithmic description;

• Documentation.

After the Electronic Industries Association (EIA) adopted the EDIF standards in 1986 the version EDIF 2 0 0 appeared in 1988, of which only the netlist version has reached a sufficient popularity. But the open definition of the netlist format proved to represent a certain weakness. EDIF defines the structure, the syntax and the semantics of the for- mats, but not the contents. As a result the suppliers of EDIF writers and those of EDIF readers have to explicitly define the content. This situation has led to a number of different non-compatible EDIF dialects.

In 1992 the EDIF Committee has been re- organized to become a division of the EIA. Today Prof. Hilary Kahn of the University of Manchester, UK, is the supervisor of the technical EDIF center. The activities concentrate on the following subcommittees:

• PCB Technical Subcommittee (Printed Circuit Boards);

• Test Technical Subcommittee;

• Schematic Technical Subcommittee;

• LPM Technical Subcommittee (Library of Parameterizable Modules).

Version EDIF 3 0 0 was published in 1993 sup- porting buses and correcting some weaknesses. Since 1996 EDIF 400 supports PCBs and MCMs (Multi-Chip Modules).

The idea behind the Library of Parameterizable Modules (LPM) was to enable the use of compact design descriptions for high level languages, such as VHDL, Verilog, or ALTERA AHDL. The set of 29 modules defined today are supposed to allow a design style independent of tool suppliers and silicon foundries (also see Chapter 17). More details about the latest and future activities can be found on the Web [8.3].

Structure and Elements of EDIF 2 0 0

Structure

The netlist format EDIF 2 0 0 has reached a wide distribution and will therefore serve for the following examples. The EDIF syntax is based on a LISP approach which can easily be scanned and interpreted by the reading program. One of the main criteria was the extendibility, a reason why the method of nested brackets has been used:

(Key Word{Integer Value | Text | Identifier | Nested Expression})

The opening parenthesis is always followed by an EDIF key word. The optional list of subsequent elements may contain integer values, text, EDIF identifiers, and further EDIF expressions. The structure of the format is in a sense object oriented because the assignment of a name or a value is only valid in the area of the last parenthetical key word. In two different libraries equally named cells may exist, but not in the same library.

This type of syntax is very verbose; a lot of text is used and it is difficult to write by hand. Although the number of pre-defined key words is relatively high [8.2], additional key words may be defined by the user with ‘key word Alias’ or ‘keyword Define’. The same is possible for identifiers, such as device names or node names, by the use of ‘rename’. Using that mechanism one can replace characters generated by a system that are not recognized on the target system (for example, leading numbers).

In principle such an EDIF netlist is node oriented. At first, all devices are listed including the pins and their direction (input, output, etc.). Then each node is listed with the pins connected to that node. Additional information is also placed in the list, such as the libraries used, the date, and the generating system.

Elements

The EDIF Reference Document [8.2] defines about 400 key words and identifiers. As an example, some of those are explained here:

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