Symbolic Design Entry:The Role of Symbolic Design Entry.

The Role of Symbolic Design Entry
The First Steps in Electronic Design Symbolic design entry, also called schematic en- try, describes the process of entering the circuit schematics of an electronic design into a computer. This is done with the aid of a special graphics program, the schematic editor. The schematic entry usually represents the first step of a design process. At this point there are two major goals to be reached: firstly, the graphical documentation; secondly, the starting point for further, automatic design steps.

True to the motto ‘A picture tells a thousand words’ the use of circuit editors has been developing steadily since the early 1980s and they are now available on any type of computer and under any operating system. The symbols of the electronic devices to be used are positioned in an editor and their pins connected by lines which represent the wires of the implementation. The topologi- cal arrangement of the symbols normally has no influence upon or relationship with the physical placement of the devices in the final design.

The graphics will then be converted into a netlist which basically has exactly the same information content as the circuit diagram; that is to say, de- vices and their connections. Netlists contain the data for the consecutive design steps. In principle there are two basic types: a verification step by analog, digital, or even mixed signal simulation or the implementation step with the possible target of a PLD (Programmable Logic Device), a PCB (Printed Circuit Board) or an IC (Integrated Cir- cuit). This situation is explained in fig. 3.1.

Structural and Behavioral Description

Historically speaking, the schematic editors have replaced the process of designing circuits with pencil on paper. The strongest motivating forces for that development have already been mentioned: documentation in machine readable form for the subsequent automated processing steps. The pos- sibility of introducing much more information into screen schematics than can be contained in a simple pencil drawing has, of course, also been widely employed.

Symbolic Design Entry-0013

The design process of circuit entry produces a structural description. It implies that the designer has already constructed the circuit and knows ex- actly which devices are to be used and how they will be connected. This chapter deals mainly with this type of structural design entry. A more ab- stract method, the graphical behavior description, is presented in chapter 4.

Schematic entry is still the preferred method for small to medium designs. In contrast, the tech- nique of microelectronics allows the integration of millions of devices on a single die. For that purpose methods of high level design languages and circuit synthesis have been developed (see chapters 5 and 6). They describe not so much the final use of single devices as the entry of abstract behavioral descriptions.

In order to cope with the increasing complexity of circuits the concept of hierarchy is extensively used. Higher levels of the design contain block symbols, which represent design modules of lower levels, as well as elementary symbols, so called primitives. Such a hierarchy mechanism allows the coexistence of structural design entry next to behavioral high level entry. A block symbol is used for graphical schematics as well as textual descriptions. Both forms of design representation may be mixed and have to be fed into a synthesis program which will then interpret and optimize the design and map it into a structural netlist (see fig. 3.2). Thus the synthesis program may even be used to re-map the symbols of a structural schematic into the cells of a different implementation library, as long as the functionality of entry and the physical design are convertible.

Symbolic Design Entry-0014

On the one hand, there is no compatibility between different schematic editors. There are only very few cases where the format of one graphical tool can be read in, or converted into, the format of another CAD tool, even if the symbol libraries rep- resent the same physical devices. Altera Corporation, the supplier of FPGAs (Field Programmable Gate Arrays) and CPLDs (Complex Programmable Logic Devices) allows, for example, reading in OrCAD STD schematics. Naturally, one may only use symbols in the primary editor which can be understood by the reading editor.

There have been attempts to represent the circuit diagram in standardized EDIF (Electronic Design Interchange Format, see chapter 8). Whilst EDIF is widely used for netlist transfer, the use for symbol and schematic exchange has not been very successful. The main reason for failure seems to lie in the various incompatible editor features and that EDIF standardizes the syntax but not the content. As a result every tool manufacturer may create his own EDIF dialect.

On the other hand, there is no standardization of the symbol libraries. This is true for symbol names, shapes, functionality, and symbol pins. Even on the same tool one cannot easily translate the schematics based on symbols for semiconduc- tor foundry A into schematics for foundry B. The D-flipflop of library A may switch on the rising clock edge and the flipflop of library B on the falling clock edge or the reset input may be of active high or active low type. A relatively costly Only the use of circuit synthesis has solved this problem and has thus made circuits portable. A circuit may be drawn with the symbols of one foundry and can then be translated into the netlist of a second foundry.

very similar, the characteristics of three different design tools will be explained:

• Graphic Editor of Altera Corporation, which allows the schematic entry for ALTERA CPLDs. The ALTERA system is optimized for easy entry of hierarchical schematics in parallel with textual entry [3.1].

The Windows version of MAX2PLUS V9.23 is used (short form: ALTERA).

• Schematic Editor by Cadence/OrCAD (ex MicroSim), which is used for digital, analog, mixed and behavioral simulation with PSPICE and for the design of PLDs and PCBs [3.4]. The Windows version 9.1 is used (short form: PSPICE).

• Design Architect by Mentor Graphics Corporation with the programs NETED and SYMED. This system is the most universal one of the three [3.3].

Version C1 on HP Unix V10.20 is used (short form MENTOR).

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