Front-end Design Tools:Design Capture Tools.

Introduction

The front-end EDA tools help develop the IC design and verify its correctness. EDA tools have replaced many of the most tedious manual design tasks. Table 6.1 shows the major EDA programs with the FE tools highlighted.

Other tools for areas such as signal integrity and design for manufacturing are used in both the front-end and back-end. We discuss those in the chapter on back-end tools.

Let us join Nora of Sandbox, Inc., as she talks with Luigi, a logic designer at Federal Semiconductor.

Nora:

Thanks for meeting me for lunch, Luigi. Sandbox has many tools, so I am trying to understand what they all do.

Luigi:

Glad to help, Nora. You said you wanted to discuss the front-end tools. Why don't we start with design capture?

Design Capture Tools

Table .

Luigi:

Design entry or design capture tools allow the engineer to enter design ideas into the computer. Entry is done using either graphical symbols or textual descriptions. The design can be displayed in several forms or views.

Different tools work at different levels of design abstraction (or detail), so you need to understand what those are. Let me describe each for you. I'll explain the jargon as we go.

Device modeling is the lowest level of abstraction and is used by physicists and IC manufacturers to model transistor devices. Most chip design starts at the next level of abstraction, circuit design.

Circuit design uses diagrams with graphical symbols to represent devices such as transistors, resistors, or capacitors. Lines between device inputs and outputs represent interconnect wires. Each symbol corresponds to a software model of the device on the computer. This graphical view is called a schematic diagram. A textual description view can also be created using a circuit description language.

Logic design is the next level above circuit design. (Several transistors connected together can make a logical switch or gate). There are a variety of gate types used to make complex logical decisions. The logic designer normally works with logic gates chosen from a list or library of available, predesigned gate types. Logic design can be done using either a logic schematic symbol view or a textual entry view.

Nora:

Yes, I know a little about the logic gates.

Luigi:

Let me draw you some quick examples of a transistor circuit and logic schematics. (See Figure 6.1.) Note that schematic entry may be at the circuit level or the logic gate level.

Luigi:

The logic designer's library also includes flip-flops. Each flip-flop can store one bit of information (i.e., a one or a zero).

A row of flip-flops forms a register, which can store a byte (eight bits) or more of data. Data words may be anywhere from two to eight bytes long. Memory blocks can store thousands—even millions—of words of data.

Nora:

With that many transistors to deal with, I see why we need EDA tools.

Luigi:

Yes, it would take us years to do what the tools can do in minutes. Moving up a level from gates, logic designers do Register Transfer Level (RTL) design. RTL design consists largely of three actions:

• Moving data between registers and memory

• Manipulating the data (e.g., adding or comparing)

• Storing the result in another register or memory location

The Register Transfer Level (RTL) design information is entered using a hardware description language (HDL).

Table 6.1. Major Front-end Tools

ELECTRONIC SYSTEM-LEVEL (ESL) DESIGN

Users

Tools

Architect

ESL Design Entry

System Engineer

ESL Verification

IC System Engineer

ESL Modeling

ESL Timing Analysis

FRONT-END (FE) DESIGN

REGISTER LEVEL

Users

Tools

RTL Entry

System Engineer

Test Bench

Logic Designer

RTL Simulation

ASIC Designer

Formal Verification

Test Engineer

Design for Test

Timing Design

Thermal Design

Power Design

Signal Integrity Design

Synthesis to Gates

GATE LEVEL

Users

Tools

Schematic Capture

Logic Designer

Gate-Level Simulation

ASIC Designer

BACK-END (BE) DESIGN

Users

Tools

Floorplanning

Layout—Place & Route

Layout Designer

Electrical Rules Check

Logic Designer

Physical Rules Check

ASIC Designer

Extractors & Delay Calculators

Test Engineer

Timing Analysis

Power Analysis

Thermal Analysis

Other Analyses

Did You Know?

How big is a thousand? A million? Big numbers can be hard to grasp without a visual example.

Most of us have seen little black poppy seeds on rolls, bagels, and loaves of bread. They are about 1/32 of an inch (or about one mm) in diameter.

If you put these small seeds in a row across a regular card table (~ about one yard or meter square), it would take about 1,000 seeds. If you covered the whole table surface, you would have used one million (1,000,000) seeds.

If you covered the table four inches deep, you would have used about 100 million seeds. That's about how many transistors can fit on an IC chip the size of your fingernail!

Hardware Description Languages

Luigi:

Hardware description languages have largely replaced the schematic entry approach for logic design.

The HDL can handle several levels of abstraction, including behavioral, register transfer, and gate levels. (Behavioral design describes how the data is manipulated.) The HDL describes both movement of data between registers (register transfer) and the gate-level control logic.

Nora:

What is control logic?

Luigi:

Control logic describes how or when something gets done. You are familiar with controllers and control logic in daily life. For instance, a thermostat controller turns the furnace on and off in a house to control the temperature. A lamp controller turns on a light at a certain time or when it gets dark.

Nora:

Okay, so the designer has to enter all the control and data information into the computer?

Luigi:

Yes, that is design capture.

Nora:

Is the hardware description language in English?

Luigi:

No, unfortunately, human languages are too complex. HDLs are simpler.

Luigi:

Two standard HDLs emerged— Verilog (originally a vendor HDL) and VHDL (a standards group HDL). The Accellera standards group now manages both languages, so both are open and available. EDA software has been developed for both languages. Eventually, VHDL and Verilog will merge or one will supplant the other. Some tools can translate from one to the other for interactive editing in either representation. (We also have tools that can convert a schematic to an HDL and vice versa.)

Luigi:

Let me show you a simplified HDL-like description. (See Figure 6.2.) Real HDL code is a bit more technical. Note that the text is a description of the graphic gate schematic next to it on the figure.

Luigi:

Moving up yet another level, design ideas are often described with block diagrams. Here is a block diagram example. (See Figure 6.3.)

The block diagrams show the functions needed and their sequence or relationships. The implementation method for each block or function (such as H/W or S/W) may be still undecided. Modeling languages are sometimes used to describe functions and bus data transfers at this level.

Nora:

So which entry method is better?

Luigi:

It's a matter of experience and preference. All methods are used at different stages of design. Due to increasing chip complexity, designers are using higher-level languages, and a computer generates the lower-level detailed descriptions.

Did You Know?

A hardware description language is just a programming language suited for describing electronic circuits. There are many similar specialized languages for other fields.

English is not used as an HDL because it is too ambiguous. HDLs are defined very formally in syntax (symbols and structure) and in semantics (meanings and relationships). They are much simpler than English, with typically only a few hundred words and rules.

Did You Know?

VHDL came out of a U.S. Department of Defense program called VHSIC (Very High-Speed Integrated Circuits). The military/aerospace IC design market adopted it, as did most of Europe, while Verilog became the de facto U.S. commercial standard.

Specialized Design Tools

Nora:

Are those the only methods to enter the design?

Luigi:

No, there are tools for designing specific subsystems. These include memory systems, network interfaces, and peripheral interfaces. Some design tools focus on specific building blocks such as processors or memory blocks.

However, in whatever way the information is entered, the result comes out the same.

Nora:

What is the result?

Netlist Output

Luigi:

The final output of the HDL or schematic is the design netlist. This is a listing of all the gates, flip-flops, registers, and their interconnections (nets). The netlist is compiled from the HDL or a synthesis tool.

Synthesis is like turning an architect's drawings into a parts list which a builder can use. You go from general descriptions of wood, cables, windows, and so forth, to actual part brands and model numbers.

For a system-on-chip IC design, the front-end may include ESL design tools. As you know, there are several efforts to standardize an abstraction-level language above RTL. The goal is to allow direct conversion from that language into either an HDL description or into a software language description.

Nora:

Yes, Sam discussed that with me, and he mentioned the many chances for design errors. Isn't the HDL design entry prone to errors?

Design Capture Checking Tools

Luigi:

Sure, and that's why we have some checking tools. After we capture the hardware design, we check the HDL code for grammar and syntax errors. The EDA tools are called HDL checkers, and they work similarly to a word processor spelling checker.

Did You Know?

An early checker for C programs was called "lint" (lexical interpreter). The checking program would clean up the syntax errors. They would "get the lint out of " (or "de-lint") the software code. The "lint" checker term later got applied to a variety of HDL check programs.